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as1118 64 led driver for mobile applications with error detection www.austriamicrosystems.com/led-driver-ics/as1118 revision 1.00 1 - 19 datasheet 1 general description the as1118 is a compact led driver for 64 single leds or 8 digits of 7-segments. the devices can be pro- grammed via an spi compatible 3-wire interface. every segment can be individually addressed and updated separately. only one external resistor (r set ) is required to set the current. led brightness can be controlled by analog or digital means. the devices include an inte- grated bcd code-b/hex decoder, multiplex scan cir- cuitry, segment and display drivers, and a 64-bit memory. internal memory stor es the shift register set- tings, eliminating the need for continuous device repro- gramming. additionally the as1118 offers a detailed error diagnostic mode for easy and fast production testing in critical applications. the as1118 features a low shutdown cur- rent of typically 200na, and an operational current of typically 350a. the number of digits can be pro- grammed, the devices can be reset by software, and an external clock is also suppor ted. the device is available in a tqfn(4x4)-24 package. figure 1. as1118 - typical application diagram 2 key features 10mhz spi-compatible interface open and shorted led error detection - global or individual error detection hexadecimal- or bcd-code for 7-segment displays 200na low-power shutdown current (typ; data retained) individual digit brightness control digital and analog brightness control display blanked on power-up drive common-cathode led displays supply voltage range: 2.7v to 5.5v software and hardware reset optional external clock package: tqfn(4x4)-24 3 applications the as1118 is ideal for seven-segment or dot matrix dis- plays in mobile applications, public information displays at subway, train or bus stations, at airports and also at displays in public transportation like buses or trains, per- sonal electronic and toys. table 1. available products devices reset input interfaces as1115 no i2c as1116 no spi as1117 yes i2c as1118 yes spi as1118 dig0 to dig7 sega-dp i/o i/o i/o v dd iset sdi ld gnd scl 2.7v to 5.5v 9.53k p 8 sdo as1118 sdi ld resetn sdo as1118 sdi ld resetn sdo i/o 8 8 8 8 diagnostic readback: open & shorted leds i/o resetn scl scl vdd ,
www.austriamicrosystems.com/led-driver-ics/as1118 revision 1.00 2 - 19 as1118 datasheet - pinout 4 pinout pin assignments figure 2. pin assignments (top view) pin descriptions table 2. pin descriptions pin name tqfn(4x4)-24 description sdi 22 serial-data input . data is loaded into the internal 16-bit shift register on the rising edge of pin scl. dig0:dig7 1, 2, 4, 5, 7, 8, 23, 24 digit drive lines . eight digit drive lines that sink current from the display cathode. gnd 3 ground . ld 9 load. serial data is loaded into the shift register while this pin is low. the last 16 bits of serial data are latche d on the rising edge of this pin. resetn 6 reset input. pull this pin to low to resest all registers (set to default values) and to put the device into shutdown. i set 10 set segment current . connect to v dd or a reference voltage through r set to set the peak segment current (see selecting rset resistor value and using external drivers on page 15 ). scl 11 serial-clock input . 10mhz maximum rate. data is sh ifted into the internal shift register on the rising edge of this pin. data is clocked out of pin sdo on the rising edge of this pin. sega:segg, segdp 12-15, 17-20 seven segment and decimal point drive lines . 8 seven-segment drives and decimal point drive that source current to the display. vdd 16 positive supply voltage . connect to +2.7v to +5.5v supply. bypass this pin to gnd with a 10f and a 0.1f capacitor to avoid power supply ripple. sdo 21 serial-data output . the data into pin sdi is valid at pin sdo 16 clock cycles later. this pin is used to daisy-chain several devices and is never high- impedance. exposed pad exposed pad. this pin also functions as a heat sink. solder it to a large pad or to the circuit-board ground plane to maximize power dissipation. seg e dig7 8 18 segb 14 dig2 1 gnd 3 as1118 dig5 5 iset 10 sega 12 vdd 16 segc 17 segg 15 segf 13 dig3 2 dig4 4 resetn 6 scl 11 ld 9 dig6 7 dig0 23 sdo 21 segdp 19 segd 20 sdi 22 dig1 24
www.austriamicrosystems.com/led-driver-ics/as1118 revision 1.00 3 - 19 as1118 datasheet - absolute maximum ratings 5 absolute maximum ratings stresses beyond those listed in table 3 may cause permanent damage to the device. these are stress ratings only, and functional operation of the de vice at these or any other cond itions beyond those indicated in section 6 electrical characteristics on page 4 is not implied. exposure to absolute maxi mum rating conditions for extended periods may affect device reliability. table 3. absolute maximum ratings parameter min max units notes input voltage range v dd to gnd -0.3 7 v all other pins to gnd -0.3 7 or v dd + 0.3 v current dig0:dig7 sink current 500 ma sega:segg, segdp 100 ma humidity 5 85 % non-condensing esd digital outputs 1 kv norm: mil 833 e method 3015 all other pins latch-up immunity 100 ma eia/jesd78 thermal resistance ja 30.5 oc/w on pcb ambient temperature -40 +85 oc storage temperature -55 150 oc package body temperature +260 oc the reflow peak soldering temperature (body temperature) specified is in accordance with ipc/ jedec j-std-020d ?moisture/ reflow sensitivity classification for non-hermetic solid state surface mount devices?. the lead finish for pb-free leaded packages is matte tin (100% sn).
www.austriamicrosystems.com/led-driver-ics/as1118 revision 1.00 4 - 19 as1118 datasheet - electrical characteristics 6 electrical characteristics v dd = 2.7v to 5.5v, r set = 9.53k , t amb = -40c to +85c, typ. values @ t amb = +25oc and v dd = 5.0v (unless oth- erwise specified). see figure 18 on page 8 for more information. table 4. electrical characteristics symbol parameter conditions min typ max unit v dd operating supply voltage 2.7 5.5 v i ddsd shutdown supply current all digital inputs at v dd or gnd, t amb = +25oc 0.2 2 a i dd operating supply current r set = open circuit. 0.35 0.6 ma all segments and decimal point on; i seg = -40ma. 335 f osc display scan rate 8 digits scanned 0.6 0.8 1.2 khz i digit digit drive sink current v out = 0.65v 320 ma i seg segment drive source current v dd = 5.0v, v out = (v dd -1v) -37 -42 -47 ma i seg segment drive current matching 3% i seg segment drive source current average current 47 ma table 5. logic inputs/outputs characteristics symbol parameter conditions min typ max unit i ih , i il input current sdi, scl, ld v in = 0v or v dd -1 1 a v ih logic high input voltage sdi, scl, ld, resetn 1.26 v v il logic low input voltage sdi, scl, ld, resetn 0.54 v v oh output high voltage sdo, i source = -1ma, v dd = 5.0v v dd - 1 v sdo, i source = -1ma, v dd = 3.0v v dd - 0.5 v ol output low voltage sdo, i sink = 1ma 0.4 v v i hysteresis voltage sdi, scl, ld 1 v open detection level threshold 0.7x v dd 0.75x v dd 0.8x v dd v short detection level threshold 0.05x v dd 0.1x v dd 0.15x v dd v table 6. spi timing characteristics symbol parameter conditions min typ max unit t cp scl clock period 100 ns t ch scl pulse width high 20 ns t cl scl pulse width low 20 ns t css ld to scl rise setup time 25 ns t csh scl rise to ld rise hold time 10 ns t ds sdi setup time 0 ns t dh sdi hold time 5 ns t do output data propagation delay c load = 50pf 25 ns t ldck ld rising edge to scl rising edge 20 ns t csw minimum ld pulse high 20 ns t dspd data-to-segment delay 2.25 ms
www.austriamicrosystems.com/led-driver-ics/as1118 revision 1.00 5 - 19 as1118 datasheet - typical operating characteristics 7 typical operating characteristics r set = 9.53k , v rset = v dd ; figure 3. display scan rate vs. supply voltage; figure 4. display scan rate vs. temperature; 840 860 880 900 920 940 960 980 2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5 vd d (v) fosc (hz) . tamb = - 40c t amb = + 2 5c t amb = + 8 5c 840 860 880 900 920 940 960 980 -40 -15 10 35 60 85 tam b (c) fosc (hz) . vdd = 2.7v vdd = 4v vdd = 5v v d d = 5.5v figure 5. segment current vs. temperat ure; figure 6. segment current vs. r set ; 0 10 20 30 40 50 60 -40 -15 10 35 60 85 tam b (c) iseg (ma) . v seg = 1.7v ; v d d = 2 .7v v seg = 1.7v ; v d d = 5v v seg = 3 v ; v d d = 5v v seg = 4 v ; v d d = 5v 0 10 20 30 40 50 0 102030405060708090 rset (kohm) iseg (ma) . vseg = 4v; vdd = 5v vseg = 3v; vdd = 5v vseg = 2v; vdd = 5v v seg = 1.7v ; v d d = 2 .7v figure 7. segment current vs. supply voltage; figure 8. segment current vs. v dd ; v rset = 2.8v 0 10 20 30 40 50 60 2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5 vd d (v) iseg (ma) . v seg = 1.7v vseg = 3v vseg = 4v 0 5 10 15 20 25 30 35 40 45 50 2.7 3 3.3 3.6 3.9 4.2 vd d (v) iseg (ma) . v seg = 1.7v vseg = 2v vseg = 2.3v vseg = 3.1v
www.austriamicrosystems.com/led-driver-ics/as1118 revision 1.00 6 - 19 as1118 datasheet - typical operating characteristics figure 9. v digit vs. i digit figure 10. input high level vs. supply voltage 0 0.1 0.2 0.3 0.4 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 idig (a) vdig (v) . vdd = 2.7v vdd = 3.3v vdd = 4v vdd = 5v v d d = 5.5v 0 0.5 1 1.5 2 2.5 3 3.5 2.73.13.53.94.34.75.15.5 vd d (v) vih (v) . figure 11. i seg vs. v seg ; v dd = 5v figure 12. i seg vs. v seg ; v dd = 4v 0 5 10 15 20 25 30 35 40 45 50 2 2.5 3 3.5 4 4.5 5 vs e g (v) iseg (ma) . rext = 10k rext = 13k rext = 18k rext = 30k rext = 56k 0 5 10 15 20 25 30 35 40 45 50 11.522.533.54 vs e g (v) iseg (ma) . rext = 8k2 rext = 10k rext = 13k rext = 18k rext = 30k figure 13. i seg vs. v seg ; v dd = 3.3v figure 14. i seg vs. v seg ; v dd = 2.7v 0 5 10 15 20 25 30 35 40 45 50 1 1.2 1.4 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 vs e g (v) iseg (ma) . rext = 6k8 rext = 8k2 rext = 10k rext = 13k rext = 18k 0 5 10 15 20 25 30 35 40 45 50 1 1.2 1.4 1.6 1.8 2 2.2 2.4 2.6 vs e g (v) iseg (ma) . rext = 4k 7 rext = 5k6 rext = 6k8 rext = 10k rext = 13k
www.austriamicrosystems.com/led-driver-ics/as1118 revision 1.00 7 - 19 as1118 datasheet - detailed description 8 detailed description block diagram figure 15. as1118 - block diagram figure 16. esd structure as1118 registers digital control logic oszillator open/short detection spi interface + ? + ? scan - registers control - registers data - registers (pwm, debounce,....) 12-15, 17-20 sega-g, segdp 2-5, 7-10 dig0 to dig7 3 gnd 8 8 11 scl 22 sdi 21 sdo 9 ld r set 10 iset vdd 16 vdd 100nf 6 resetn vdd valid for the pins: - sdi - scl - sdo - ld - iset - sega-g, segdp - resetn vdd valid for the pins: - dig0 to dig7
www.austriamicrosystems.com/led-driver-ics/as1118 revision 1.00 8 - 19 as1118 datasheet - detailed description serial-addressing format the as1118 contains a 16bit spi interface to access the internal data and control registers of the device (see digit- and control-registers on page 9) . the spi interface is driven with the rising edge of scl. a falling edge on ld signal indicates the beginning of an access on the spi interface, the rising edge on ld determines an access on spi. an access must consist of exactly 16bits for write operation and 8bits for read operation. timing restrictions on the spi interface pins are defined in figure 18 . ta b l e 7 shows the structure of the 16bit command word for writing data, table 8 the 8bit command word for read oper- ation. d0 (write operation) / d8 (read operation) is the first bit to shift into the spi interface after the falling edge of ld, is th e last bit to write to spi before rising edge of ld. at a read operation an 8bit operation is executed. at the first rising edge of scl after the rising edge of ld d7 of addressed register is written to sdo pin. at the next rising edg e of scl d6 is written to sdo pin. ld must be kept high during reading data from a internal data or control register of as1118. figure 17. read operation figure 18. interface timing initial power-up on initial power-up, the as1118 registers are reset to their default values, the display is blanked, and the device goes into shutdown mode. at this time, all registers should be programmed for normal operation. note: the default settings enable only scanning of one digit; the internal decoder is disabled and the intensity control register ( see page 13 ) is set to the minimum values. table 7. 16-bit serial data format d0 d1 d2 d3 d4 d5 d6 d7 d8 d9 d10 d11 d12 d13 d14 d15 lsb data msb register address (see ta b l e 8 )0r/wx 19 810 16 d4 d3 d2 d1 d0 d6 d5 d7 scl ld sdo t cl ld scl sdi sdo d0 d1 d14 d15 t do t css t ds t dh t ch t cp t csh t csw t ldck
www.austriamicrosystems.com/led-driver-ics/as1118 revision 1.00 9 - 19 as1118 datasheet - detailed description shutdown mode the as1118 devices feature a shutdown mode, where they consume only 200na (typ) current. shutdown mode is entered via a write to the shutdown register (see ta b l e 9 ) or via pulling the pin resten to logic low. when pin resetn is set to logic low an according write to the shutdown register is d one internally. for the as1118, at that point, all segment current sources and digital drivers are switched off, so that all segments are blanked. during shutdown mode the digit-registers maintain their data. note: when pin resetn is pulled to logic high again, a write to the shutdown register in necessary to leave the shutdown mode. shutdown mode can either be used as a means to reduce power consumption or for generating a flashing display (repeatedly entering and leaving shutdown mode). for minimum supply current in shutdown mode, logic input should be at gnd or v dd (cmos logic level). when entering or leaving shutdown mode, the feature register is reset to its default values (all 0s) when shutdown register bit d7 (page 10) = 0. note: when shutdown register bit d7 = 1, the feature register is left unchanged when entering or leaving shut- down mode. if the as1118 is used with an external clock, shutdown register bit d7 should be set to 1 when writing to the shutdown register. digit- and cont rol-registers the as1118 devices contain 8 digit-registers,11 control-registers and 8 diagnostic-registers, which are listed in table 8 . all registers are selected using a 8-bit address word, and communication is done via the serial interface. digit registers ? these registers are realized with an on-c hip 64-bit memory. each digit can be controlled directly without rewriting the whole register contents. control registers ? these registers consist of decode mode, display intensity, number of scanned digits, shut- down, display test and features selection registers. table 8. register address map type register address page d15 d14 d13 d12 d11 d10 d9 d8 d7:d0 no-op x0000000 14 digit register digit 0 x0000001 (see table 11 on page 11 , table 12 on page 11 and table 13 on page 11 ) n/a digit 1 x0000010 n/a digit 2 x0000011 n/a digit 3 x0000100 n/a digit 4 x0000101 n/a digit 5 x0000110 n/a digit 6 x0000111 n/a digit 7 x0001000 n/a control register decode-mode x0001001( see table 10 on page 10 ) 10 global intensity x 0 0 0 1 0 1 0 ( see table 17 on page 13 ) 13 scan limit x0001011( see table 19 on page 13 ) 13 shutdown x 0 0 0 1 1 0 0 ( see table 9 on page 10 ) 9 not used x0001101 n/a feature x 0/1 0 0 1 1 1 0 ( see table 20 on page 14 ) 14 display test mode x 0 0 0 1 1 1 1 ( see table 14 on page 12 ) 10 dig0:dig1 intensity x 0 0 1 0 0 0 0 ( see table 18 on page 13 ) dig2:dig3 intensity x 0 0 1 0 0 0 1 ( see table 18 on page 13 ) dig4:dig5 intensity x 0 0 1 0 0 1 0 ( see table 18 on page 13 ) dig6:dig7 intensity x 0 0 1 0 0 1 1 ( see table 18 on page 13 )
www.austriamicrosystems.com/led-driver-ics/as1118 revision 1.00 10 - 19 as1118 datasheet - detailed description note: write operation: d14=0; read operation: d14=1. the shutdown register controls as1118 shutdown mode. decode enable register (0x09) the decode enable register sets the decode mode. bcd/hex decoding (either bcd code ? characters 0:9, e, h, l, p, and -, or hex code ? characters 0:9 and a:f) is selected by bit d2 (page 14) of the feature register. the decode enable register is used to select the decode mode or no-decode for each digit. each bit in the decode enable regis- ter corresponds to its respective display digit (i.e., bit d0 corresponds to digit 0, bit d1 corresponds to digit 1 and so on). table 11 lists some examples of the possible settings for the decode enable register bits. note: a logic high enables decoding and a logic low bypasses the decoder altogether. when decode mode is used, the decoder looks only at the lower-nibble (bits d3:d0) of the data in the digit-registers, disregarding bits d6:d4. bit d7 sets the decimal point (seg dp) independent of the decoder and is positive logic (bit d7 = 1 turns the decimal point on). ta b l e 11 lists the code-b font; table 12 lists the hex font. when no-decode mode is selected, data bits d7:d0 of the digit-registers correspond to the segment lines of the as1118. table 13 shows the 1:1 pairing of each data bit to the appropriate segment line. diagnostic register diagnostic digit 0 x 1 0 1 0 1 0 0 n/a diagnostic digit 1 x 1 0 1 0 1 0 1 n/a diagnostic digit 2 x 1 0 1 0 1 1 0 n/a diagnostic digit 3 x 1 0 1 1 0 1 1 n/a diagnostic digit 4 x 1 0 1 1 0 0 0 n/a diagnostic digit 5 x 1 0 1 1 0 0 1 n/a diagnostic digit 6 x 1 0 1 1 0 1 0 n/a diagnostic digit 7 x 1 0 1 1 0 1 1 n/a table 9. shutdown register format (address (hex) = 0x0c)) mode hex code register data d7 d6 d5 d4 d3 d2 d1 d0 shutdown mode, reset feature register to default settings 0x000xxxxxx0 shutdown mode, feature register unchanged 0x801xxxxxx0 normal operation, reset feature register to default settings 0x010xxxxxx1 normal operation, feature register unchanged 0x811xxxxxx1 table 10. decode enable register format examples decode mode hex code register data d7 d6 d5 d4 d3 d2 d1 d0 no decode for digits 7:0 0x000000000 0 code-b/hex decode for digit 0. no decode for digits 7:1 0x01 00000001 code-b/hex decode for digit 0:2. no decode for digits 7:3 0x0700000111 code-b/hex decode for digits 0:5. no decode for digits 7:6 0x3f00111111 code-b/hex decode for digits 0,2,5. no decode for digits 1, 3, 4, 6, 70x2500100101 table 8. register address map type register address page d15 d14 d13 d12 d11 d10 d9 d8 d7:d0
www.austriamicrosystems.com/led-driver-ics/as1118 revision 1.00 11 - 19 as1118 datasheet - detailed description figure 19. standard 7-segment led table 11. code-b font char- acter register data char- acter register data char- acter register data d7 d6:d4 d3 d2 d1 d0 d7 d6: d4 d3 d2 d1 d0 d7 d6:d4 d3 d2 d1 d0 x 0000 x 0110 x 1100 x 0001 x 0111 x 1101 x 0010 x 1000 x 1110 x 0011 x 1001 x 1111 x 0100 x 1010 1 * xxxxx x 0101 x 1011 * the decimal point can be enabled with every character by setting bit d7 = 1. table 12. hex font char- acter register data char- acter register data char- acter register data d7 d6:d4 d3 d2 d1 d0 d7 d6: d4 d3 d2 d1 d0 d7 d6:d4 d3 d2 d1 d0 x 0000 x 0110 x 1100 x 0001 x 0111 x 1101 x 0010 x 1000 x 1110 x 0011 x 1001 x 1111 x 0100 x 1010 1 * xxxxx x 0101 x 1011 * the decimal point can be enabled with every character by setting bit d7 = 1. table 13. no-decode mode data bits and corresponding segment lines d7 d6 d5 d4 d3 d2 d1 d0 corresponding segment line dp a b c d e f g a b g f e d c dp
www.austriamicrosystems.com/led-driver-ics/as1118 revision 1.00 12 - 19 as1118 datasheet - detailed description display-test mode the as1118 can detect open or shorted leds. readout of either open leds (d2=1) or short leds (d1=1) is possible, as well as a or relation of open and short (d1=d2=1). after a dignostic run bit d4 can be read to clearify if an error occurred before reading out detailed diagnostic data. note: all settings of the digit- and control-registers are maintained. led diagnostic registers these eight registers contain the result of the led open/short test for the individual led of each digit. note: if more than 2 shorts occure in the led array, detection of individual led fault could become limited to blocs. intensity control register (0x0a) the brightness of the display can be controlled by digital means using the intensity control registers and by analog means using r set (see selecting rset resistor value and using external drivers on page 15 ). the intensity can be controlled globally for all digits, or for each digit individually. the global intensity command will write intensity data to a ll four individual brightness registers, while the individual intesity command will only write to the associated individual intensity register. table 14. testmode register summary d7 d6 d5 d4 d3 d2 d1 d0 x rext_short rext_open led_global led_test led_open led_short disp_test table 15. testmode register bit description (address (hex) = 0x0f)) addr: 0x0f address bit bit name default access d7:d0 d0 disp_test 0 w optical display test. (testmode for external visual test.) 0: normal operation; 1: run display test (all digits are tested independently from scan limit & shutdown register.) d1 led_short 0 w starts a test for shorted leds. (can be set together with d2) 0: normal operation; 1: activate testmode d2 led_open 0 w starts a test for open leds. (can be set together with d1) 0: normal operation; 1: activate testmode d3 led_test 0 r indicates an ongoing open/short led test 0: no ongoing led test; 1: led test in progress d4 led_global 0 r indicates that the last open/short led test has detected an error 0: no error detected; 1: error detected d5 rext_open 0 r checks if external resistor r ext is open 0: r ext correct; 1: r ext is open d6 rext_short 0 r checks if external resistor r ext is shorted 0: r ext correct; 1: r ext is shorted d7 0 - not used table 16. led diagnostic register address register hex address segment register hex address segment digit d7 d6 d5 d4 d3 d2 d1 d0 digit d7 d6 d5 d4 d3 d2 d1 d0 0x14 dig0 dp a b c d e f g 0x18 dig4 dp a b c d e f g 0x15 dig1 0x19 dig5 0x16 dig2 0x1a dig6 0x17 dig3 0x1b dig7
www.austriamicrosystems.com/led-driver-ics/as1118 revision 1.00 13 - 19 as1118 datasheet - detailed description display brightness is controlled by an integrated pulse-width modulator which is controlled by the lower-nibble of the intensity control register. the modulator scales the average segment-current in 16 steps from a maximum of 15/16 down to 1/16 of the peak current set by r set . scan-limit register (0x0b) the scan-limit register controls which of the digits are to be displayed. when all 8 digits are to be displayed, the update frequency is typically 0.8khz. if the number of digits displayed is reduced, the update frequency is increased. the frequency can be calculated using 8fosc/n, where n is the number of digits. since the number of displayed digits influences the brightness, r set should be adjusted accordingly. note: to avoid differences in brightness this register should not be used to blank parts of the display (leading zeros). table 17. intensity register format duty cycle hex code register data duty cycle hex code register data msb d2 d1 lsb msb d2 d1 lsb 1/16 (min on) 0xx0 0 0 0 0 9/16 0xx8 1 0 0 0 2/16 0xx1 0 0 0 1 10/16 0xx9 1 0 0 1 3/16 0xx2 0 0 1 0 11/16 0xxa 1 0 1 0 4/16 0xx3 0 0 1 1 12/16 0xxb 1 0 1 1 5/16 0xx4 0 1 0 0 13/16 0xxc 1 1 0 0 6/16 0xx5 0 1 0 1 14/16 0xxd 1 1 0 1 7/16 0xx6 0 1 1 0 15/16 0xxe 1 1 1 0 8/16 0xx7 0 1 1 1 15/16 (max on) 0xxf 1 1 1 1 table 18. intensit y register address register hex address register data type d7:d4 d3:d0 0x0a global x global intensity 0x10 digit digit 1 intensity digit 0 intensity 0x11 digit digit 3 intensity digit 2 intensity 0x12 digit digit 5 intensity digit 4 intensity 0x13 digit digit 7 intensity digit 6 intensity table 19. scan-limit register format (address (hex) = 0x0b)) scan limit hex code register data scan limit hex code register data d7:d3 d2 d1 d0 d7:d3 d2 d1 d0 display digit 0 only 0xx0 x 0 0 0 display digits 0:4 0xx4 x 1 0 0 display digits 0:1 0xx1 x 0 0 1 display digits 0:5 0xx5 x 1 0 1 display digits 0:2 0xx2 x 0 1 0 display digits 0:6 0xx6 x 1 1 0 display digits 0:3 0xx3 x 0 1 1 display digits 0:7 0xx7 x 1 1 1
www.austriamicrosystems.com/led-driver-ics/as1118 revision 1.00 14 - 19 as1118 datasheet - detailed description feature register (0x0e) the feature register is used for enabling various features including switching the device into external clock mode, applying an external reset, selecting code-b or hex decoding, enabling or disabling blinking, enabling or disabling the spi-compatible interface, setting the blinking rate, and resetting the blink timing. note: at power-up the feature register is initialized to 0. no-op register (0xx0) the no-op register is used when multiple as1118 devices are cascaded in order to support displays with more than 8 digits. the cascading must be done in such a way that all sdo pins are connected to sdi of the next as1118 ( see fig- ure 20 on page 16 ). the ld and scl signals are connected to all devices. for example, if five devices are cascaded, in order to perf orm a write operation to the fifth device, the write-command must be followed by four no-operation commands. when the ld signal goes high, all shift registers are latched. the first four devices will receive no-operation commands and only the fifth device will receive the intended operation com- mand, and subsequently update its register. table 20. feature register summary d7 d6 d5 d4 d3 d2 d1 d0 blink_ start sync blink_ freq_sel blink_en nu decode_sel reg_res clk_en table 21. feature register bit descriptions (address (hex) = 0xxe) addr: 0xxe feature register enables and disables various device features. bit bit name default access bit description d0 clk_en 0r/w external clock active. 0 = internal oscillator is used for system clock. 1 = pin clk of the serial interface operates as system clock input. d1 reg_res 0r/w resets all control registers except the feature register. 0 = reset disabled. normal operation. 1 = all control registers are reset to default state (except the feature register) identically after power-up. note: the digit registers maintain their data. d2 decode_sel 0r/w selects display decoding for the selected digits ( table 10 on page 10 ). 0 = enable code-b decoding (see table 11 on page 11 ). 1 = enable hex decoding (see table 12 on page 11 ). d3 nu not used d4 blink_en 0r/w enables blinking. 0 = disable blinking. 1 = enable blinking. d5 blink_freq_sel 0r/w sets blink with low frequency (with the internal oscillator enabled): 0 = blink period typically is 1 second (0.5s on, 0.5s off). 1 = blink period is 2 seconds (1s on, 1s off). d6 sync 0r/w synchronizes blinking on the rising edge of pin ld. the multiplex and blink timing counter is cleared on the rising edge of pin ld. by setting this bit in multiple devices, the blink timing can be synchronized across all the devices. d7 blink_start 0r/w start blinking with display enabled phase. when bit d4 (blink_en) is set, bit d7 determines how blinking starts. 0 = blinking starts with the display turned off. 1 = blinking starts with the display turned on.
www.austriamicrosystems.com/led-driver-ics/as1118 revision 1.00 15 - 19 as1118 datasheet - typical application 9 typical application selecting r set resistor value and us ing external drivers brightness of the display s egments is controlled via r set . the current that flows between v dd and i set defines the current that flows through the leds. segment current is about 200 times the current in i set . typical values for r set for different segment currents, operat- ing voltages, and led voltage drop (v led ) are given in table 22 & table 23 . the maximum current the as1118 can drive is 47ma. if higher currents are needed, external driver s must be used, in which case it is no longer necessary that the devices drive high currents. note: the display brightness can also be logically controlled (see intensity control register (0x0a) on page 12) . calculating power dissipation the upper limit for power dissipation (pd) for the as1118 is determined from the following equation: pd = (v dd x 5ma) + (v dd - v led )(duty x i seg x n) (eq 1) where: v dd is the supply voltage. duty is the duty cycle set by intensity register (page 13) . n is the number of segments driven (worst case is 8) v led is the led forward voltage i seg = segment current set by rset dissipation example: i seg = 40ma, n = 8, duty = 15/16, v led = 2.2v at 40ma, v dd = 5v (eq 2) pd = 5v(5ma) + (5v - 2.2v)(15/16 x 40ma x 8) = 0.865w (eq 3) thus, for a qsop-24 package ja = +88c/w, the maximum allowed t amb is given by: t j,max = t amb + pd x ja = 150c = t amb + 0.865w x 88c/w (eq 4) in this example the maximum ambient temperature must stay below 73.88c. table 22. r set vs. segment current and led forward voltage, v dd = 2.7v & 3.3v & 3.6v i seg (ma) v led v led v led 1.5v 2.0v 1.5v 2.0v 2.5v 1.5v 2.0v 2.5v 3.0v 40 v dd = 2.7v 5k 4.4k v dd = 3.3v 6.7k 6.4k 5.7k v dd = 3.6v 7.5k 7.2k 6.6k 5.5k 30 6.9k 5.9k 9.1k 8.8k 8.1k 10.18k 9.8k 9.2k 7.5k 20 10.7k 9.6k 13.9k 13.3k 12.6k 15.6k 15k 14.3k 13k 10 22.2k 20.7k 28.8k 27.7k 26k 31.9k 31k 29.5k 27.3k table 23. r set vs. segment current and led forward voltage, v dd = 4.0v & 5.0v i seg (ma) v led v led 1.5v 2.0v 2.5v 3.0v 3.5v 1.5v 2.0v 2.5v 3.0v 3.5v 4.0v 40 v dd = 4.0v 8.6k 8.3k 7.9k 7.6k 5.2k v dd = 5.0v 11.35k 11.12k 10.84k 10.49k 10.2k 9.9k 30 11.6k 11.2k 10.8k 9.9k 7.8k 15.4k 15.1k 14.7k 14.4k 13.6k 13.1k 20 17.7k 17.3k 16.6k 15.6k 13.6k 23.6k 23.1k 22.6k 22k 21.1k 20.2k 10 36.89k 35.7k 34.5k 32.5k 29.1k 48.9k 47.8k 46.9k 45.4k 43.8k 42k
www.austriamicrosystems.com/led-driver-ics/as1118 revision 1.00 16 - 19 as1118 datasheet - typical application 8x8 dot matrix mode the application example in figure 20 shows the as1118 in the 8x8 led dot matrix mode. the led columns have common cathodes and are connected to the dig0:7 outputs. the rows are connected to the segment drivers. each of the 64 leds can be addressed separately. the columns are selected via the digits as listed in table 8 on page 9 . the decode enable register ( see page 10 ) must be set to ?00000000? as described in table 10 on page 10 . single leds in a column can be addressed as described in table 13 on page 11 , where bit d0 corresponds to segment g and bit d7 corresponds to segment dp. note: for a multiple-digit dot matrix, multiple as1118 devices can be cascaded easily. figure 20. application example as led dot matrix driver supply bypassing and wiring in order to achieve optimal performance the as1118 should be placed very close to the led display to minimize effects of electromagnetic interference and wiring inductance. furthermore, it is recommended to connect a 10f electrolytic and a 0.1f ceramic capacitor between pins v dd and gnd to avoid power supply ripple ( see figure 15 on page 7 ). as1118 i/o i/o i/o v dd iset sdi ld gnd scl 2.7v to 5v 9.53k p i/o diagnostic readback: open & shorted leds sdo diode arrangement dig0 to dig7 seg a to g sep dp vdd resetn
www.austriamicrosystems.com/led-driver-ics/as1118 revision 1.00 17 - 19 as1118 datasheet - package drawings and markings 10 package drawings and markings the as1118 is available in the tqfn(4x4)-24 package. figure 21. tqfn(4x4)-24 package notes: 1. unilateral coplanarity zone applies to the exposed heat sink slug as well as the terminals. 2. all dimensions are in millimeters; angles in degrees. 3. dimension b applies to metallized terminal and is measured between 0.25mm and 0.30mm from terminal tip. dimension l1 represents terminal full back from package edge up to 0.1mm is acceptable. 4. coplanarity applies to the exposed heat slug as well as the terminal. 5. radius on terminal is optional. 24 19 20 21 22 23 7 8 9 10 11 12 4 5 6 2 3 1 13 14 15 16 17 18 m m symbol min typ max a 0.50 0.55 0.60 a1 0.00 0.05 a3 0.152ref b 0.18 0.23 0.28 d 4.00bsc e 4.00bsc d2 2.70 2.80 2.90 e2 2.70 2.80 2.90 symbol min typ max e 0.50bsc l 0.30 0.35 0.40 l1 0.00 0.10 aaa 0.10 bbb 0.10 ccc 0.10 ddd 0.05 eee 0.08
www.austriamicrosystems.com/led-driver-ics/as1118 revision 1.00 18 - 19 as1118 datasheet - ordering information 11 ordering information the devices are available as the standard products shown in table 24 . note: all products are rohs compliant. buy our products or get free samples online at icdirect: http://www.austriamicr osystems.com/icdirect technical support is found at http://www.austriamicrosyst ems.com/technical-support for further information and requests, please contact us mailto:sales@austriamicrosystems.com or find your local distributor at http://www.a ustriamicrosystems.com/distributor table 24. ordering information ordering code marking desciption delivery form package AS1118-BQFT assx 64 led driver for mobile applications with error detection tape and reel tqfn(4x4)-24
www.austriamicrosystems.com/led-driver-ics/as1118 revision 1.00 19 - 19 as1118 datasheet copyrights copyright ? 1997-201 0, austriamicrosystems ag, tobelbaderstrasse 30, 8141 unterpremstaet ten, austria-europe. trademarks registered ?. all rights reserved. the mate rial herein may not be reproduced, adapted, merged, translated, stored, or used without the prio r written consent of the copyright owner. all products and companies mentioned are trademarks or registered trademarks of their respective companies. disclaimer devices sold by austriamicrosystems ag are covered by t he warranty and patent indemni fication provisions appearing in its term of sale. austriamicrosystems ag makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. austriamicrosystems ag reserves the right to change specifications and prices at any time and without notice. therefore, prior to designing this pro duct into a system, it is necessary to check with austriam icrosystems ag for current information. this product is intended for use in normal commercial applications. applications requiring extended temperature range, unusual environ mental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment are specif ically not recommended without additional processing by austriamicrosystems ag for each application. for shipments of less than 100 parts the manufacturing flow might show deviations from the standard production flow, such as test flow or test location. the information furnished here by austriamicrosystems ag is believed to be correct and accurate. however, austriamicrosystems ag shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. no obligation or liability to recipient or any third party shall arise or flow out of austriamicrosystems ag rendering of technical or other services. contact information headquarters austriamicrosystems ag tobelbaderstrasse 30 a-8141 unterpremstaetten, austria tel: +43 (0) 3136 500 0 fax: +43 (0) 3136 525 01 for sales offices, distributors and representatives, please visit: http://www.austriamicrosystems.com/contact

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